Difference between revisions of "Resource:Seminar"

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{{SemNote
{{SemNote
|time='''Friday 10:30-12:00'''
|time='''2026-04-10 10:30'''
|addr=4th Research Building A518
|addr=4th Research Building A518
|note=Useful links: [[Resource:Reading_List|Readling list]]; [[Resource:Seminar_schedules|Schedules]]; [[Resource:Previous_Seminars|Previous seminars]].
|note=Useful links: [[Resource:Reading_List|📚 Readling list]]; [[Resource:Seminar_schedules|📆 Schedules]]; [[Resource:Previous_Seminars|🧐 Previous seminars]].
}}
}}


===Latest===
===Latest===
{{Latest_seminar
{{Latest_seminar
|abstract=LoRa Wide Area Network (LoRaWAN) has emerged as a dominant technology for Low Power Wide Area Networks (LPWAN). However, due to the ever-growing network size, packet collisions caused by concurrent transmissions have become a serious challenge in LoRa Wan.Existing studies have either ignored the issue by exploring only a few inaccurate features or addressed it using a complex receiver with up to eight antennas. To strike a better balance between implementation cost and system performance, we propose Hi 2 LoRa, which leverages highly dimensional and highly accurate features for LoRa concurrent decoding with only two receiving antennas. The feature dimensions are extended by exploring various types of hardware imperfections and channel state information inherent to each transceiver pair. To improve feature accuracy, low pass filters and BiLSTM networks are employed to trace and learn their temporal patterns. Additionally, an effective collision suppression strategy is introduced to combat feature corruption from other concurrent packets. Extensive evaluations on real-world testbeds show that the achievable concurrency in Hi2LoRa is either close to that of state-of-the-art approaches with much higher complexity (e.g., using eight antennas) or 2.7 x of prior work with comparable complexity (e.g., using two antennas).
|abstract = To effectively utilize heterogeneous specialized hardware units in modern GPUs, such as TensorCores and Tensor Memory Accelerators, this paper introduces PipeThreader, a new DNN compiler. PipeThreader proposes shifting scheduling functionality from hardware to software so as to enable more efficient and sophisticated computation pipelining with minimal manual effort. This is achieved through sTask-graph, a new DNN computation abstraction, a hierarchical hardware abstraction that captures the capabilities of specialized units, and new scheduling primitives. As a result, PipeThreader can discover efficient pipeline scheduling for well-studied DNN architectures like FlashAttention, achieving comparable or even superior performance. Additionally, it can uncover novel pipeline schemes for emerging models like Mamba2, delivering significantly better performance compared to state-of-the-art hand-crafted implementations. The code is open-sourced at https://github.com/tile-ai/tilelang.
|confname=ICNP'23
|confname =OSDI'25
|link=https://ieeexplore.ieee.org/abstract/document/10355583
|link = https://www.usenix.org/conference/osdi25/presentation/cheng
|title=Hi2LoRa: Exploring Highly Dimensional and Highly Accurate Features to Push LoRaWAN Concurrency Limits with Low Implementation Cost
|title= PipeThreader: Software-defined pipelining for efficient DNN execution
|speaker=Jiyi
|speaker=Junzhe
|date=2024-07-05}}
|date=2026-4-9
{{Latest_seminar
}}
|abstract=Centralized approaches for multi-robot coverage planning problems suffer from the lack of scalability. Learning-based distributed algorithms provide a scalable avenue in addition to bringing data-oriented feature generation capabilities to the table, allowing integration with other learning-based approaches. To this end, we present a learning-based, differentiable distributed coverage planner (D2CoP LAN ) which scales efficiently in runtime and number of agents compared to the expert algorithm, and performs on par with the classical distributed algorithm. In addition, we show that D2CoP LAN can be seamlessly combined with other learning methods to learn end-to-end, resulting in a better solution than the individually trained modules, opening doors to further research for tasks that remain elusive with classical methods.
 
|confname=ICRA'23
|link=https://ieeexplore.ieee.org/abstract/document/10160341
|title=D2CoPlan: A Differentiable Decentralized Planner for Multi-Robot Coverage
|speaker=Xianyang
|date=2024-07-05}}
{{Resource:Previous_Seminars}}
{{Resource:Previous_Seminars}}

Latest revision as of 10:37, 10 April 2026

Time: 2026-04-10 10:30
Address: 4th Research Building A518
Useful links: 📚 Readling list; 📆 Schedules; 🧐 Previous seminars.

Latest

  1. [OSDI'25] PipeThreader: Software-defined pipelining for efficient DNN execution, Junzhe
    Abstract: To effectively utilize heterogeneous specialized hardware units in modern GPUs, such as TensorCores and Tensor Memory Accelerators, this paper introduces PipeThreader, a new DNN compiler. PipeThreader proposes shifting scheduling functionality from hardware to software so as to enable more efficient and sophisticated computation pipelining with minimal manual effort. This is achieved through sTask-graph, a new DNN computation abstraction, a hierarchical hardware abstraction that captures the capabilities of specialized units, and new scheduling primitives. As a result, PipeThreader can discover efficient pipeline scheduling for well-studied DNN architectures like FlashAttention, achieving comparable or even superior performance. Additionally, it can uncover novel pipeline schemes for emerging models like Mamba2, delivering significantly better performance compared to state-of-the-art hand-crafted implementations. The code is open-sourced at https://github.com/tile-ai/tilelang.

History

2024

2023

2022

2021

2020

  • [Topic] [ The path planning algorithm for multiple mobile edge servers in EdgeGO], Rong Cong, 2020-11-18

2019

2018

2017

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